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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MC14LC5480EVK/D
MC14LC5480EVK
Advance Information
MC14LC5480, MC145481, MC145482, MC145483, and MC145484 PCM Codec-Filter Evaluation Kit Users Manual
+ 5 V GND
CLOCK GENERATION CIRCUITRY
CLOCKS
ANALOG INTERFACE
PCM CODECFILTER
PCM INTERFACE
This document contains information on a new product. Specifications and information herein are subject to change without notice.
All brand names and product names appearing in this document are registered trademarks of their respective holders.
REV 0 3/97 TN97033100
(c) Motorola, Inc. 1997 MOTOROLA
MC14LC5480EVK 1
MC14LC5480EVK TABLE OF CONTENTS
Section 1 - General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Organization of Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 EVK Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Product Feature Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Section 2 - Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Clock Generation Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Jumper Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Handset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Section 3 - Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Standalone Operation - MC14LC5480 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Back-to-Back Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of Figures Figure 1-1. MC14LC5480EVK Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 2-1. Switch S1 Settings for FSYNC Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 2-2. S1 Settings for Transcoding Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 2-3. MC14LC5480EVK Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 3-1. Jumper Positions for Standalone Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 3-2. Jumper Positions for Back-to-Back Operation -- MC14LC5480EVK #1 . . . . . . . . . . . . . . . . . . . Figure 3-3. Jumper Positions for Back-to-Back Operation -- MC14LC5480EVK #2 . . . . . . . . . . . . . . . . . . . Figure 3-4. Recommended Cabling for Back-to-Back Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 4 5 6 6 9 11 12 12 13
4 6 7 8 12 13 14 15
MC14LC5480EVK 2
MOTOROLA
SECTION 1 - GENERAL DESCRIPTION
1.1 ORGANIZATION OF DATA SHEET
This document is composed of three sections. Section 1 is intended to introduce the MC14LC5480EVK Codec-Filter Evaluation Kit with a brief description of the evaluation board and a list of key features. Section 2 introduces the hardware comprising each functional block of the MC14LC5480EVK. Section 3 describes the standalone operating modes and indicates a recommended jumper positioning for these modes. It also discusses the back-to-back mode of operation using two MC14LC5480EVKs. Appended to the end of this document are the latest data sheets for the applicable devices.
1.2
INTRODUCTION
The MC14LC5480EVK is the primary tool for evaluation and demonstration of the following PCM and linear codec-filters. Table 1-1. Mu-/A-Law and Linear PCM Codec-Filters
Part Number MC14LC5480 MC145481 MC145482 MC145483 MC145484 VCC 5V 3V 5V 3V 5V Description Mu-/A-Law Companding Mu-/A-Law Companding Linear Linear Mu-/A-Law Companding
Figure 1-1 is a functional block diagram of the MC14LC5480EVK. The MC14LC5480EVK is comprised of two functional blocks -- the clocking circuitry, and one of the PCM Codec- Filters listed in Table 1-1. User I/O to the board is provided via a number of convenient connectors. First, an industry standard 4-pin RJ11 handset jack (P1) is provided to connect the handset included with the kit. Next, a 2x20 pin header (P13) is provided for access to key analog and digital signals for connection to external test equipment, a user defined system, or a second MC14LC5480EVK. And finally, two male BNC connectors (P6 and P14) provide convenient access to the codec's analog transmit and receive paths for connection to external test equipment. The MC14LC5480EVK requires either a 5 V or 3 V supply provided through P2 at the top of the circuit board.
MOTOROLA
MC14LC5480EVK 3
+ 5 V GND
CLOCK GENERATION CIRCUITRY
CLOCKS
ANALOG INTERFACE
PCM CODECFILTER
PCM INTERFACE
Figure 1-1. MC14LC5480EVK Functional Block Diagram
1.3
EVK FEATURES
* * * * * * * * Provides Standalone Evaluation on a Single Board Single 5 V or 3 V Power Supply Easily Interfaced to Test Equipment, Customer System, or Second MC14LC5480EVK Convenient Access to Key Signals Generous Wire Wrap Area for Application Development Kit Provides Analog-to-Analog, Analog-to-Digital, and Digital-to-Analog Compatible Handset Provided Kit Includes: Schematics, Data Sheets, User's Manual, and Samples of Each PCM Codec-Filter
MC14LC5480EVK 4
MOTOROLA
1.4
PRODUCT FEATURE OVERVIEW
GENERAL: * All of the PCM Codec-Filter Products Described in this Document are: * Manufactured in a 0.8 Micron CMOS Process * Designed with Differential Analog Circuits for Lowest Noise * Available in 20-Pin Plastic SOIC and SSOP Packages SPECIFIC BY DEVICE: MC14LC5480 * * * * * Single 5 V Power Supply Typical Power Dissipation of 15 mW, Power Down of < 1 mW Conforms to CCITT, ITU-T, and Bell Specifications Pin 16 = Mu-Law or A-Law Companding Pin 1 = RO+ Output
MC145481 * * * * * Single 3 V Power Supply Typical Power Dissipation of 8 mW, Power Down of < 1 mW Conforms to CCITT, ITU-T, and Bell Specifications Pin 16 = Mu-Law or A-Law Companding Pin 1 = VAG Ref
MC145482 * * * * * * Single 5 V Power Supply Typical Power Dissipation of 30 mW, Power Down of < 1 mW 13-Bit Linear 2's Complement Sample Rates from 7 kHz to 16 kHz Pin 16 = HB (High-Pass Filter Bypass) Pin 1 = VAG Ref
MC145483 * * * * * * Single 3 V Power Supply Typical Power Dissipation of 8 mW, Power Down of < 1 mW 13-Bit Linear 2's Complement Sample Rate of 8 kHz Pin 16 = HB (High-Pass Filter Bypass) Pin 1 = VAG Ref
MC145484 * * * * *
MOTOROLA
Single 5 V Power Supply Typical Power Dissipation of 15 mW, Power Down of < 1 mW Conforms to CCITT, ITU-T, and Bell Specifications Pin 16 = Mu-Law or A-Law Companding Pin 1 = VAG Ref
MC14LC5480EVK 5
SECTION 2 - HARDWARE DESCRIPTION
NOTE Please refer to the MC14LC5480EVK schematic for the following discussion of the hardware.
For the MC14LC5480 PCM Codec-Filter, Jumper J4 must be open. For the MC145481, MC145482, MC145483, and MC145484, Jumper J4 must be connected.
2.1
CLOCK GENERATION CIRCUITRY
A 4.096 MHz crystal oscillator is used as the system clock for the MC14LC5480EVK. From this 4.096 MHz crystal, frame sync (FSYNC), bit clock (BCLK), and 256 kHz are derived for use by the PCM Codec-Filter.
FSYNC
Frame sync (FSYNC) is generated on-board, and is controlled through J20A for FSR (frame sync receive), and J16 for FST (frame sync transmit). Populating these jumpers also routes the FSYNC to the 2x20 connector (P13), Pin 40 (FSR), and Pin 1 (FST). S1 allows the user to select the "width" of FSYNC. The FSYNC pulse width is set as a number of BCLKs. The following number of BCLKs for FSYNC can be set with S1. * 1-2-3-4-8-12-13-16 The switch S1 configurations for these settings are presented below.
FSYNC = 1 BCLK ON OFF FSYNC = 2 BCLK FSYNC = 3 BCLK FSYNC = 4 BCLK ON OFF
FSYNC = 8 BCLK ON OFF
FSYNC = 12 BCLK
FSYNC = 13 BCLK
FSYNC = 16 BCLK ON OFF
Figure 2-1. Switch S1 Settings for FSYNC Duration When configuring the MC14LC5480EVK to connect to the MC145532 ADPCM Transcoder, the various transcoding rates of the MC145532 can be exercised using the S1 switch positions as shown in Figure 2-2. Refer to the MC145532 data sheet for relevant timing diagrams.
MC14LC5480EVK 6
MOTOROLA
64 kbps ON OFF
32 kbps ON OFF
24 kbps ON OFF
16 kbps ON OFF
Figure 2-2. S1 Settings for Transcoding Rates NOTE For above settings to be valid, it is important to have the J2A jumper populated. This sets the FSYNC at 8 kHz. Populating J2B sets the FSYNC at 16 kHz, which is used exclusively for the MC145482 13-Bit Linear PCM Codec-Filter.
BCLK
Bit Clock (BCLK) is routed through J19A (BCLKR) and J8 (BCLKT). When these jumpers are populated, BCLK is presented to the 2x20 connector (P13), Pin 36 (BCLKR), and Pin 5 (BCLKT). J1 allows the user to select the frequency at which BLCK operates. The jumper-selectable frequencies are 4.096 MHz, 2.048 MHz, 1.024 MHz, 512 kHz, 128 kHz, and 64 kHz.
256 kHz
256 kHz is presented to J7A as a possible frequency setting for the master clock (MCLK) input on the chosen PCM Codec-Filter. J7B will configure the MCLK input to have a frequency equal to BCLK.
MOTOROLA
MC14LC5480EVK 7
Figure 2-3. MC14LC5480EVK Schematic
MC14LC5480EVK 8 MOTOROLA
2.2
JUMPER DESCRIPTIONS
NOTE When a jumper is referenced as J#, where # is a number: A populated jumper enables the function, an unpopulated jumper disables the function. When a jumper is referenced as J#@, where # is a number and @ is a letter: Only one jumper may be populated for each given # location. For example, populate J2A or J2B, not J2A and J2B.
J1:
BCLK SELECT
J1 selects the BCLK frequency. A choice of seven frequencies is available -- these are from 64 kHz to 4.096 MHz.
J2A: FSYNC = 8 kHz
J2A sets the FSYNC to 8 kHz.
J2B: FSYNC = 16 kHz
J2B sets the FSYNC to 16 kHz, for use with the MC145482 only.
J3:
SIDETONE
J3 enables the sidetone path on the PCM Codec-Filter.
J4:
VAG CAP ENABLE
J4 enables the VAG filter cap. This jumper should be populated only when evaluating the MC145481, MC145482, MC145483, and MC145484. It should not be populated when evaluating the MC14LC5480.
J5A: SPKR+ = RO+
J5A connects the path from the MC14LC5480 Pin 1 (RO+) to the RJ11 and handset. This jumper should not be populated when evaluating the MC145481, MC145482, MC145483, and MC145484.
J5B: SPKR+ = PO-
J5B connects a path from the PCM Codec-Filter Pin 4 (PO-) to the RJ11 and handset.
J6:
NOT AVAILABLE
J7A: MCLK = 256 kHz
J7A sets the MCLK Pin 11 to 256 kHz.
J7B: MCLK = BCLK
J7B sets the MCLK Pin 11 to be equal to BCLK.
MOTOROLA MC14LC5480EVK 9
J8:
BCLKT = BCLK
J8 connects BCLK to BCLKT (Pin 12) of the PCM Codec-Filter.
J9:
NOT AVAILABLE
J10A: MU-LAW SELECT/HIGH-PASS FILTER BYPASS
J10A selects Mu-Law on the MC14LC5480, MC145481, and MC145484. On the MC145482 and MC145483, this jumper enables the high-pass filter bypass for frequency response down to DC for the transmit ADC conversion.
J10B: A-LAW SELECT/HIGH-PASS FILTER BYPASS DISABLE
J10B selects A-Law on the MC14LC5480, MC145481, and MC145484. On the MC145482 and MC145483, this jumper disables the high-pass filter bypass.
J11A: SPKR- = RO-
J11A connects RO- (Pin 2) to the RJ11 and the receive output BNC connector.
J11B: SPKR- = PO+
J11B connects PO+ (Pin 5) to the RJ11 and the receive output BNC connector.
J12: NOT AVAILABLE J13: NOT AVAILABLE J14: NOT AVAILABLE J15: NOT AVAILABLE J16: FST = FSYNC
J16 connects the on-board generated FSYNC to the PCM Codec-Filter (Pin 14) FST as well as Pin 1 of the 2x20 connector (P13).
J17A: POWER-UP
J17A connects the PDI (Pin 10) of the PCM Codec-Filter to VDD to power-up the device.
J17B: POWER-DOWN
J17B connects the PDI (Pin 10) of the PCM Codec-Filter to VSS to power-down the device.
J18: DT = DR
J18 connects the data transmit (DT Pin 13) to the data receive (DR Pin 8) of the PCM Codec-Filter.
MC14LC5480EVK 10 MOTOROLA
J19A: BCLKR + BCLK
J19A connects BCLKR (Pin 9) of the PCM Codec-Filter to BCLK.
J19B: BCLKR = VDD
J19B connects BCLKR (Pin 9) of the PCM Codec-Filter to VDD for IDL interface compatibility.
J19C: BCLKR = VSS
J19C connects BCLKR (Pin 9) of the PCM Codec-Filter to VSS for GCI interface compatibility.
J20A: FSR = FSYNC
J20A connects FSR (Pin 7) of the PCM Codec-Filter to FSYNC.
J20B: FSR = VDD
J20B connects FSR (Pin 7) of the PCM Codec-Filter to VDD to select channel B2 in the IDL or GCI ISDN mode.
J20C: FSR = VSS
J20C connects FSR (Pin 7) of the PCM Codec-Filter to VSS to select channel B1 in the IDL or GCI ISDN mode.
J21: DT OUT
J21 connects DT of the PCM Codec-Filter to P13 (Pin 9).
2.3
HANDSET
The compatible handset included with the kit is a Walker Equipment Corporation W3-KM-EM-80RP00, reverse polarity. The handset is a "K" style unit with a 4-pin modular connector. The handset incorporates a low-level electret microphone and a dynamic receiver equipped with a hearing aid coil and a varistor for receive level limiting.
Transmitter
Transmit Output Level @ 1000 Hz: - 46 dBV 4 dB Output Impedance @ 100 Hz: 1000 300
Receiver
Receive Output Level @ 1000 Hz: 79 dBSPL 4 dB Receive Input Impedance @ 100 Hz: 150 20% For more detailed characteristics of the W3-KM-EM-80RP00 handset, please contact Walker Equipment Corporation at 1-800-HANDSET.
MOTOROLA MC14LC5480EVK 11
SECTION 3 - OPERATING MODES
3.1 STANDALONE OPERATION - MC14LC5480
Figure 3-1 indicates the proper position of jumpers to operate the MC14LC5480EVK "standalone". The "darkened" areas indicate the position of a populated jumper. Signal flow for the standalone mode as indicated in Figure 3-1 is as follows. A signal input at P4, Transmit Input, is presented to the encoder of the MC14LC5480 where it is digitized and output on the Data Transmit (DT) pin (Jumper J18). This provides a "local loopback" of PCM data to the Data Receive (DR) pin of the MC14LC5480, where it is reconstructed and output at P14, Receive Output.
V DD
GND
PROTOTYPE AREA
D1 P2
GND
X1 D3
+
C9 U2 U1 P13 1 J1
R7 R4 TRANSMIT INPUT - P6 U7 P1 C6 J18 J8 J19A C7 HANDSET C5 J19B J19C J17A J17B V Cap AG SPKR+ = RO+ SPKR+ = POJ4 J5A J5B J10A J10B J16 J20A J20B J3 J20C J7A J7B SPKR+ = ROJ11A J11B SPKR+ = PO+ R8 R10 R13 J2A J2B DT = DR BCLKT = BCLK BCLKR = BCLK BCLKR = V CC BCLKR = GND PDI = V (UP) CC PDI = V (DOWN) SS Mu-Law A-Law FST = FSYNC FSR = FSYNC FSR = V CC FSR = GND MCLK = 256 kHz MCLK = BCLK FSYNC = 8 kHz FSYNC = 16 kHz U5 R12
4096 MHz 2048 MHz 1024 MHz 512 MHz 256 MHz 128 MHz 64 MHz J21 DT OUT
+
C3
SIDETONE
U6
U4
U3
+
C10 RECEIVE OUTPUT - P14
MOTOROLA INC. MC14LC5480EVK EVALUATION BOARD VERSION -
RP1 1 = ON S1 0 = OFF FRAME SYNC PULSE WIDTH
SWITCH S1 111 1111 0 111 1110 0 111 1100 0 111 1000 0 111 0000 0 110 0000 0 100 0000 0 000 0000 0
FSYNC LENGTH 1 2 3 4 8 12 13 16
Figure 3-1. Jumper Positions for Standalone Operation
MC14LC5480EVK 12
MOTOROLA
3.2
BACK-TO-BACK OPERATION
Figures 3-2 and 3-3 indicate the proper position of jumpers to operate two MC14LC5480EVKs back-to-back. When the jumpers are populated as shown and the boards are connected as in Figure 3-4, this signal path realizes a full "analog-to-analog", "handset-to-handset" connection -- passing data from PCM Codec-Filter to PCM Codec- Filter. Board #1 acts as the system master, providing BCLK and FSYNC to board #2.
V DD
GND
PROTOTYPE AREA
D1 P2
GND
X1 D3
+
C9 U2 U1 P13 1 J1
R7 R4 TRANSMIT INPUT - P6 U7 P1 C6 J18 J8 J19A C7 HANDSET C5 J19B J19C J17A J17B V Cap AG SPKR+ = RO+ SPKR+ = POJ4 J5A J5B J10A J10B J16 J20A J20B J3 J20C J7A J7B SPKR+ = ROJ11A J11B SPKR+ = PO+ R8 R10 R13 J2A J2B DT = DR BCLKT = BCLK BCLKR = BCLK BCLKR = V CC BCLKR = GND PDI = V (UP) CC PDI = V (DOWN) SS Mu-Law A-Law FST = FSYNC FSR = FSYNC FSR = V CC FSR = GND MCLK = 256 kHz MCLK = BCLK FSYNC = 8 kHz FSYNC = 16 kHz U5 R12
4096 MHz 2048 MHz 1024 MHz 512 MHz 256 MHz 128 MHz 64 MHz J21 DT OUT
+
C3
SIDETONE
U6
U4
U3
+
C10 RECEIVE OUTPUT - P14
MOTOROLA INC. MC14LC5480EVK EVALUATION BOARD VERSION -
RP1 1 = ON S1 0 = OFF FRAME SYNC PULSE WIDTH
SWITCH S1 111 1111 0 111 1110 0 111 1100 0 111 1000 0 111 0000 0 110 0000 0 100 0000 0 000 0000 0
FSYNC LENGTH 1 2 3 4 8 12 13 16
Figure 3-2. Jumper Positions for Back-to-Back Operation -- MC14LC5480EVK #1
MOTOROLA
MC14LC5480EVK 13
V DD
GND
PROTOTYPE AREA
D1 P2
GND
X1 D3
+
C9 U2 U1 P13 1 J1
R7 R4 TRANSMIT INPUT - P6 U7 P1 C6 J18 J8 J19A C7 HANDSET C5 J19B J19C J17A J17B V Cap AG SPKR+ = RO+ SPKR+ = POJ4 J5A J5B J10A J10B J16 J20A J20B J3 J20C J7A J7B SPKR+ = ROJ11A J11B SPKR+ = PO+ R8 R10 R13 J2A J2B DT = DR BCLKT = BCLK BCLKR = BCLK BCLKR = V CC BCLKR = GND PDI = V (UP) CC PDI = V (DOWN) SS Mu-Law A-Law FST = FSYNC FSR = FSYNC FSR = V CC FSR = GND MCLK = 256 kHz MCLK = BCLK FSYNC = 8 kHz FSYNC = 16 kHz U5 R12
4096 MHz 2048 MHz 1024 MHz 512 MHz 256 MHz 128 MHz 64 MHz J21 DT OUT
+
C3
SIDETONE
U6
U4
U3
+
C10 RECEIVE OUTPUT - P14
MOTOROLA INC. MC14LC5480EVK EVALUATION BOARD VERSION -
RP1 1 = ON S1 0 = OFF FRAME SYNC PULSE WIDTH
SWITCH S1 111 1111 0 111 1110 0 111 1100 0 111 1000 0 111 0000 0 110 0000 0 100 0000 0 000 0000 0
FSYNC LENGTH 1 2 3 4 8 12 13 16
Figure 3-3. Jumper Positions for Back-to-Back Operation -- MC14LC5480EVK #2 The MC14LC5480EVK was designed to connect back-to-back as shown in Figure 3-4. A 2x20 ribbon cable, 2-3 inches maximum in length, makes all necessary electrical connections, allowing a full "analog-to-analog", "handset-to-handset" path to be established. NOTE Power and ground are bussed to the second MC14LC5480EVK. Do not connect a second power supply to board #2!
MC14LC5480EVK 14
MOTOROLA
VC
C
G
N
D
D1 Pr o t ot y pe A r e a P2
G
ND
X1
D
3
+
C
9
U2 U 1
P
13
1 J1
R7 4 R4 R T a r nsm t i Ip n ut - P6 1 U P1 2 C6 J18 J8 DT BC =D LK R 6 T=B CL K 4M Hz 1 56M 28M H H z z 7 5 12M H z J2 1 024M H z 12 2 096M 048M H H z z DT out
J19 C 7 J19
A B
BC BC
LK LK
R= R=
BC VC
LK C
H
andse
t C + 5
J19 J17
C A
BC PD
LK
R= C
GN (U
D P)
I =VC
J17 VA C 3 G C ap J4 J10
B A
PD M
I =VS uLA W
S
( DW
N
)
SP
KR
+=R
O
+
J5
A
J10 J16
B
A FS
L
AW T=F R= SY FSY NC NC
SP
KR
+=P
O
-
J5
B J20 A FS
J20 S d ie tn o e J3 J20
B C
FS FS
R= R=
VC GN
C D
J7A S J1 PK 1A R1 J1 1B R1 0 3 J2A J2B R- = R O - R8 J7B
M M
CL CL
K=2 K=B
5 6 KH CL K
z
FS FS
YN YN
C= C=
8KH 16K
z Hz U6 U 5 U 4 U 3
S
PK
R+
= PO
+ SW RP 1 1=O M C 1 4 LC 5 48 0 EV K S 1 N I TCH S1 F S Y NC LE NGT H
+ M O T O R O L A IN C .
1 1 1 1 1 11 -
1=O FF
C Re cei ve Ou tu p t- P1 4
10
E
V
A
LU V
A E
T R
IO S
N IO N
B
O -
A
R
D
0
Fr am
e
S
ync
Pu
s le
W
i dt h
Figure 3-4. Recommended Cabling for Back-to-Back Operation The preceding pages describe the "most common" configurations that the MC14LC5480EVK may operate. There are many modes of operation that have not been described in this document that the user may find useful. Please familiarize yourself with the included schematic diagram, as this may provide insight into a configuration that may prove beneficial for evaluating these parts in your application. If there are specific questions on a particular configuration that is not documented, do not hesitate to contact your local Motorola representative, or call the factory for assistance.
MOTOROLA
MC14LC5480EVK 15
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 303-675-2140 or 1-800-441-2447 JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 81-3-3521-8315
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MC14LC5480EVK 16
MC14LC5480EVK/D MOTOROLA

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Price & Availability of MC14LC5481

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